Mitsubishi Electric US Companies

News Release - For Immediate Release

 

Mitsubishi Electric Develops 135-GHz SOI-CMOS
Technology for RF/Analog and Logic Applications

System-on-Chip Technology Implements Surface- and
Buried-Channel Structures on Same Chip Without Extra Lithography Steps

 

SUNNYVALE, Calif. — December 7, 2001 The Electronic Device Group of Mitsubishi Electric & Electronics USA, Inc., announced today that its parent, Mitsubishi Electric Corporation, achieved a world-leading speed in the silicon-on-insulator (SOI) field with a new SOI-CMOS technology for RF/analog and logic applications capable of 135 GHz. This accomplishment enables SOI-CMOS technology to operate in the same frequency range as compound semiconductor technologies, such as gallium arsenide, while reducing overall power consumption and the size of communication modules.

The company also developed a system-on-chip (SOC) CMOS technology that implements surface-channel pMOSFET (SC-pMOSFET) and buried-channel pMOSFET (BC-pMOSFET) structures on the same chip without increasing lithography steps. This enables SC-pMOSFET advantages of high speed and high integration to be available on the same chip along with BC-MOSFET advantages of reliability and greater noise immunity. As a result, Mitsubishi Electric engineers were able to use 1.2-volt SC-pMOSFET structures for high-performance core circuits and 3.3-volt BC-pMOSFET structures for I/O and analog circuits. With no added lithography steps, the process is easier to implement in mass production.

Mitsubishi Electric Corporation presented technical presentations on both topics this week at the International Electron Device Meeting in Washington D.C.

 

135-GHz SOI-CMOS Technology

With the development of an SOI-CMOS technology that achieves a maximum frequency of 135 GHz, Mitsubishi Electric engineers also achieved a 10.98-dB most significant gain (MSG) at 40 GHz, also a world-leading figure.

Typically achieving oscillation frequencies of 40 GHz or higher have required the use of compound semiconductors, such as gallium arsenide, or bipolar devices because the operating frequency of conventional silicon MOS devices is limited to one-third to one-tenth of the maximum frequency. However, the advent of wireless network systems such as wireless LAN, Bluetooth, and W-CDMA have created dramatic improvements in CMOS technology for broadband communication.

Researchers have made CMOS devices with more than a 100-GHz cutoff frequency by aggressively reducing the minimum gate length, but further improvements in the maximum oscillation frequency were limited by corresponding increases in parasitic resistance and capacitance. To improve the maximum oscillation frequency, Mitsubishi Electric engineers targeted reducing source-drain junction capacitance, gate-overlap capacitance, and gate resistance.

The engineers fabricated 70-nm body-tied, partially depleted SOI MOSFET chip using 0.18-m m technology with hybrid trench isolation. The hybrid trench isolation consisted of full trench isolation which is latch-up free, and partial trench isolation which allows the body potential of the SOI MOSFET to be automatically fixed.

The engineers developed the chip using an SOI structure because SOI devices exhibit an improved maximum oscillation frequency. The body-tied SOI structure leads to improved flicker noise in the analog parts and stability of AC operation in logic parts. The dual offset-implanted source-drain structure reduced gate-overlap capacitance by using two kinds of offset gate spacers, with the spacer for CMOS logic parts set narrower than the spacer for RF/analog parts, thereby improving the performance of the CMOS logic parts. A thick salicide gate was used to suppress parasitic resistance and reduce source/drain junction leakage current. The structure also suppressed threshold voltage variations.

Mitsubishi Electric engineers demonstrated that ultra high speed is possible by combining SOI and MOSFET technologies, which also greatly reduced overall power consumption.

 

Surface- and Buried-Channel Structures Combined on Same Chip

High-performance SOC CMOS devices have traditionally employed SC-pMOSFETs because their short-channel characteristics are better than BC-pMOSFETs. However, the negative bias temperature instability (NBTI) and signal-to-noise ratio can degrade as the nitrogen concentration in the gate insulator increases to suppress boron penetration into the gate insulator from the boron-implanted SC-pMOSFET gate. NBTI degradation also becomes greater in long-channel MOSFETs, which are needed for I/O and analog circuits. As a result, BC-pMOSFETs are a promising replacement solution for SC-pMOSFETs because they offer a lower electric field for the gate insulator, improved NBTI noise immunity and improved noise characteristics, as well as improved HCI immunity.

To leverage the advantages of surface-channel and buried-channel technologies, Mitsubishi Electric engineers implemented 1.2-volt SC-pMOSFETs on the same chip with 3.3-volt BC-pMOSFETs. The 1.2-volt SC-pMOSFETs were used for high-performance core circuits because these circuits require aggressively shrunk transistors. The 3.3-volt BC-pMOSFETs were used because of their high reliability against NBTI/HCI degradations as well as for their low noise characteristics.

During fabrication, engineers simultaneously implanted gate phosphorous for the nMOSFET and 3.3-volt pMOSFET gate regions and eliminated the step required to make the Lightly-Doped-Drain (LDD) structure, which is not necessary for 3.3-volt BC-pMOSFETs because of their high HCI immunity.

As a result, Mitsubishi Electric engineers were able to develop a novel SOC device structure combining high reliability with low noise characteristics without an increase in lithography steps.

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About Mitsubishi Electric & Electronics USA, Inc.

Mitsubishi Electric Corporation and its North American affiliate, Mitsubishi Electric & Electronics USA, Inc., are world-class suppliers of semiconductors and electronic products for computers, communications, industrial, Internet-enabled, automotive, and visual applications. Mitsubishi Electric combines its systems-level expertise and high-level silicon process technologies to provide chip, chipset and system-on-chip solutions. The company is ranked among the top-tier worldwide semiconductor suppliers and offers an extensive range of semiconductor and computer system components for the North American marketplace, including embedded DRAM/flash/SRAM, ASIC, ASSP, MCU, discrete memory and memory modules, microwave/RF, and optoelectronic products.

Additional information on the Mitsubishi Electric Semiconductor Group is available at http://www.mitsubishichips.com/.


For More Information:
Positio Investor & Public Relations
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Mitsubishi Electric & Electronics USA, Inc.
John Garner
(408) 774-3191
garner_john@edg.mea.com


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